Method for fabricating semiconductor epitaxial layers using metal islands

ABSTRACT

Disclosed is a method for fabricating a GaN semiconductor epitaxial layer. The method includes the steps of: (a) providing a substrate within a reaction furnace; (b) setting a temperature range of the substrate to be 200° C.˜1,300° C.; (C) supplying a Ga metallic source on the substrate; (d) changing the supplied Ga metallic source on the substrate, to Ga metal islands; (e) supplying a nitrogenous source to the Ga metal islands after suspending supply of the Ga metallic source; (f) forming GaN islands by reacting the Ga metal islands with the nitrogenous source; and (g) growing a GaN epitaxial layer by basing the GaN islands as a seed.

TECHNICAL FIELD

This invention relates to a method for growing GaN epitaxial layershaving a high-quality crystalline structure and a method for fabricatinga GaN light emitting diode (LED) device or a GaN laser diode (LD) deviceusing the same.

BACKGROUND ART

GaN, which is a semiconductor material of a direct transition typehaving broad band gap energy of 3.4 eV, is an ideal photoelectricsemiconductor material capable of realizing all the wavelengths of lightranging from the ultraviolet band to the visible light band.

There had been much difficulty in forming GaN epitaxial layers of highquality due to non-existence of a substrate, which has a latticeconstant consistent with that of GaN, in the course of their growth. Aresolution has now become available for fabricating a GaN device of highquality by forming a low-temperature GaN buffer layer between asubstrate and a GaN device layer.

However, the GaN crystal formed by means of such method still includesmuch crystal defect (1×10⁹ cm⁻²˜1×10¹⁰ cm⁻²), which becomes a bar tostable operation and lifespan of the device. In particular, such crystaldefect becomes a cause of electron-hole combination, which becomesphonon dispersion without emission of light, thereby deteriorating theemitting efficiency.

To solve this problem, epitaxial lateral over-growth (ELOG) orpendeo-epitaxial growth has conventionally been used to decrease thecrystal defects. However, these methods commonly pose a problem ofnecessitating a photolithographic process and a subsequent etchingprocess prior to generating a GaN device layer, thereby causingcontamination of the substrate and deteriorating the productivity andyield due to the separate etching process and dual growing processes.

Under the circumstances, a new method for growing GaN has becomerequired to fabricate the GaN with a single growing process whiledecreasing the crystal defects.

DISCLOSURE Technical Problem

To solve the problem in the method of using the conventionallow-temperature GaN buffer layer, it is an object of the invention toprovide a new method for growing a GaN crystal using Ga metal instead ofthe low-temperature GaN buffer layer.

It is another object of the invention to provide a method for growingepitaxial layers of GaN semiconductor of high quality using the abovemethod, and a method for fabricating a GaN LED and LD as well as otherelectric devices using the same.

Technical Solution

To achieve the above objects, a method for fabricating epitaxial layersof GaN semiconductor according to the invention comprises the steps of:(a) providing a substrate within a reaction furnace; (b) setting atemperature range of the substrate to be 200° C.˜1,300° C.; (c)supplying a Ga metallic source on the substrate; (d) transforming thesupplied Ga metallic source on the substrate, to Ga metal islands; (e)supplying a nitrogenous source to the Ga metal islands after suspendingsupply of the GaN metallic source; (f) forming GaN islands by reactingthe Ga metal islands with the nitrogenous source; and (g) growing a GaNepitaxial layer by basing the GaN islands as seed.

Here, the nitrogenous source may comprise at least one of ammonia orhydrazine.

The epitaxial layer grown as above may be used for forming any one ofLED or LD device capable of generating light by means of electronic-holecombination.

In particular, the invention is applicable to a method for fabricating aGaN device. The method for fabricating a GaN device applicable from theinvention comprises the steps of: (a) providing a substrate within areaction furnace; (b) setting a temperature range of the substrate to be200° C.˜1,300° C.; (c) supplying a Ga metallic source on the substrate;(d) transforming the supplied Ga metallic source on the substrate, to Gametal islands; (e) supplying a nitrogenous source to the Ga metalislands after suspending supply of the GaN metallic source; (f) formingGaN islands by reacting the Ga metal islands with the nitrogenoussource; and (g) growing a u-GaN layer by basing the GaN islands as aseed; and (h) growing a GaN device layer including an n-GaN layer, a GaNactive layer and a p-GaN layer onto the u-GaN layer.

Here, the GaN active layer may be constituted to control wavelength ofthe light generated by further including at least any one material of Alor In as a compound.

ADVANTAGEOUS EFFECTS

FIG. 2 is a view of a field emission scanning electron microscopy(FE-SEM) showing Ga islands formed on a surface of a sapphire substrateaccording to the invention. FIG. 3 is an electronic microscopic viewillustrating the FE-SEM of a low-temperature GaN buffer layer fabricatedaccording to the conventional art. FIG. 3 was attached so as to becompared with FIG. 2 with the same resolution.

As shown in FIG. 2, the Ga islands according to the invention are indiscrete form. Also, the Ga islands are evenly dispersed over the entirearea of the substrate. Such discrete dispersion of the Ga islands hasalso been confirmed by a component analysis using energy dispersivespectroscopy (EDS). The average half-diameter and density of the Gaislands as shown in FIG. 2 are 48.2 nm and 133/μm², respectively. Thus,the Ga islands formed in FIG. 2 are of a nano unit.

By contrast, the low-temperature GaN thin layer in FIG. 3 is acontinuous thin layer. The difference in minute structures between FIG.2 and FIG. 3 becomes a fundamental cause of creating a notabledifference in the growing mechanism and the resultant crystal defects ofthe GaN thin layer, which is to be grown in the subsequent steps.

FIG. 4 is an electronic microscopic view of a nitride obtained bynitrifying the Ga islands formed on the surface of the sapphiresubstrate in FIG. 2. FIG. 5 is an optical microscopic view of a u-GaNthin layer grown on the substrate of nitrified Ga islands.

As shown in FIG. 4, the Ga islands in FIG. 2 have been evenly nitrifiedwith regular density.

FIG. 6 is an electronic microscopic view penetrating a plane of thesubstrate in FIG. 5. A u-GaN thin layer has been grown on the upperportion of the Ga islands nitrified according to the invention.

FIG. 7 is an electronic microscopic view penetrating a plane of theu-GaN layer fabricated by using the conventional low-temperature GaNbuffer layer. As shown in FIGS. 6 and 7, the crystal surface as grownaccording to the invention in FIG. 6 has less defects than the surfaceof the GaN thin layer in FIG. 7, which has been grown by using theconventional low-temperature GaN layer.

Such decrease in crystal defects serves to enhance internal emittingefficiency while elongating lifespan of the device. This provessuperiority of the method for growing crystals according to theinvention.

DESCRIPTION OF THE DRAWINGS

The above objects, features and advantages of the invention will becomemore apparent from the following detailed description when taken inconjunction with the accompanying drawings, in which:

FIG. 1 is a diagram illustrating a process of the invention inaccordance with time and temperature;

FIG. 2 is an electronic microscopic view of the surfaces of Ga islandsformed in the process of depositing Ga according to a best mode of theinvention;

FIG. 3 is an electronic microscopic cross-sectional view of the surfaceof the conventional low-temperature GaN buffer layer;

FIG. 4 is an electronic microscopic view of the surfaces of Ga islandsreacted with a nitrogenous source according to a best mode of theinvention;

FIG. 5 is an optical microscopic view of a u-GaN thin layer formed bythe islands in FIG. 4;

FIG. 6 is an electronic microscopic view penetrating a plane of thesubstrate, on which a u-GaN thin layer has been formed by using theislands in FIG. 4;

FIG. 7 is an electronic microscopic view penetrating a plane of alow-temperature GaN buffer layer grown by the conventional method; and

FIGS. 8 to 14 are schematic diagrams illustrating a mechanism of theinvention.

BEST MODES FOR CARRYING OUT THE INVENTION

Best modes for carrying out the invention will now be described withreference to the accompanying drawings. In the following description,same drawing reference numerals are used for the same elements even indifferent drawings. The matters defined in the description are nothingbut the ones provided to assist in a comprehensive understanding of theinvention. Thus, it is apparent that the present invention can becarried out without those defined matters. Also, well-known functions orconstructions are not described in detail since they would obscure theinvention in unnecessary detail.

FIG. 1 is a graph illustrating a process of the invention in accordancewith time and temperature.

Unlike the conventional method, the method for growing epitaxial layeraccording to the invention is not seriously dependent on interlockingwith a substrate. Thus, Si or ZnO having a high degree of latticeconstant inconsistency may be used as a substrate in addition tosapphire or SiC.

Such substrate is charged into a reaction furnace after undergoing aprocess of cleaning organic materials by means of acetone, etc. Thecharged substrate undergoes a pre-treatment step (S1) by being heated upto 1,300° C. under an atmosphere of hydrogen so as to eliminate residualorganic materials and other impure materials adsorbed on the surfacethereof.

After performing the pre-treatment step S1, the substrate is cooled downagain to take a step of depositing Ga metal (S2). The temperature rangefor performing the step S2 is 200° C.˜1,300° C., preferably 400° C.˜800°C., and more preferably 550° C.˜700° C. The step performed according tothe best mode of the invention was to form Ga metal while supplyingtrimethylgallium (TMG), which is an organic metallic source of Ga, to areaction furnace, for example, at 600° C. To prevent occurrence of anoxidizing reaction in this step, hydrogen or inactive gas such as argonor nitrogen, etc. may be supplied into the reaction furnace.

In the step S2, it is preferable to maintain the temperature at least200° C. because TMG decomposition efficiency may be reduced under thetemperature below 200° C.

The Ga metal formed in step S2 has a morphology of dome island. Tocontrol density and average diameter of such island, the temperaturerange may be variably set to be within 200° C.˜1,300° C.

Although the best mode for carrying out the invention used TMG as a Gametallic source, other Ga metal organic sources such as TEG, orprecursors of chloride such as GaCl₃, may be used as a metallic source.

Ga metal islands are formed under the temperature of 600° C., whichfalls into the temperature range according to the best mode for carryingout the invention. Supply of the Ga metallic source is then suspended.Thereafter, the temperature range of the substrate is maintained to beabout 200° C.˜1,300° C. Ammonia or hydrazine gas, which is a nitrogenoussource required to generate GaN within the reaction furnace under theatmosphere of hydrogen and/or nitrogen, is supplied to the reactionfurnace in a step of nitrifying the Ga metal island (S3). Step S3 may beperformed for about a few or several tens of minutes.

If the nitrifying step S3 is performed under the temperature lower than200° C., the nitrified GaN islands tend to have unsound surfaces or anexcessively high density. If performed at the temperature higher then1300° C., the nitrified GaN islands tend to have an excessively lowdensity. Hence, it is important to adopt appropriate conditions fornitrification within the presented temperature range.

Once after undergoing the nitrifying step, the deposited Ga islandsbecome GaN islands which are finely and evenly dispersed on thesubstrate surface.

Thereafter, the GaN islands may become seeds, which are necessary togrow GaN epitaxial layers having a crystal of high quality, andcontribute to decreasing lattice defects in the subsequent process.

If the temperature range is raised again to be about 950° C.˜1,300° C.,undoped GaN layers (hereinafter, referred to as “u-GaN layers”) aregrown, u-GaN layers of high quality can be grown with the crystaldefects of about 1/10 of those fabricated by the conventional method(S4).

The thermal graphics in FIG. 1 is a schematic diagram showingtemperatures in accordance with several modes performed in each step asdescribed above. Hence, the graphic portion appearing as if thetemperature is lowered or raised might not be the same in actualcircumstances. For example, the temperature in the step S2 may be 1,300°C., and the temperature in the step S3 may also be 1,300° C., asdescribed above with respect to the temperature range. In that case, thegraphic portion appearing as if the temperature is raised from the stepS2 to the step S3 will be linked by the same horizontal line. Therefore,the diagram in FIG. 1 is merely to assist in understanding of theinvention, and the scope of claims of the invention should not beconstrued by solely depending on the diagram in FIG. 1.

To be described herein below is a mechanism enabling the substrateaccording to the invention to grow epitaxial layers with less crystaldefects and higher quality than the conventional substrate using alow-temperature GaN buffer layer. The growing mechanism described hereinbelow is nothing but an inference by the inventors that does not bindthe invention.

As described with reference to the step S2 in FIG. 2, the outstandingdifference of the invention from the conventional substrate using alow-temperature GaN buffer layer lies in first supplying Ga metal ofgroup III only without supplying the nitrogenous source, and forming thesame on a substrate in the form of islands rather than of a thin layer.

In the next step S3 of nitrification, the Ga metal islands are reactedwith the nitrogenous source and crystallized from their surfaces. Thus,what is formed after the step S3 is not a continuous GaN thin layer likethe conventional one but a cluster of discrete GaN islands of a verysmall size, for example, nano size.

Such GaN islands function as seeds in the subsequent step S4 of growingu-GaN, and decrease probability of generating the defects due to alattice constant mismatch by lessening the contact area between thesubstrate and the u-GaN thin layers. In other words, an active lateralovergrowth occurs in step S4 from side surfaces of the GaN islandsformed in step S3 so as to prevent dispersion of the defects generatedfrom the substrate to the surfaces of GaN through formation of apotential roof. This is considered the same effect as that theconventional ELOG has been reduced to a nano size. The difference fromthe ELOG is that no necessity is required to separately form mask layersof SiOx, etc.

The mechanism of the invention will now be described in further detail.

FIG. 8 is a schematic diagram illustrating a surface of substrate 10that is supposed to be resultant from the invention. After pre-treatmentof the substrate 10, its temperature range is changed to be 200°C.˜1,300° C. Then, Ga metallic source is supplied together with hydrogenor nitrogen to form a metallic layer. As a consequence, metallicparticles, or Ga islands 20 are deposited on the surface of thesubstrate 10, as shown in FIG. 8, to form a metallic layer over theentire surface of the substrate 10 dispersed by pores andnon-crystalline or amorphous structures.

After formation of the above metallic layer, supply of the metallicsource gas is suspended, and the formed metallic layer is thermallyetched. Then, the temperature range of the substrate 10 is maintained tobe 200° C.˜1,300° C.

During the step of raising the temperature as shown in FIG. 9, themetallic particles that had been gathered together with a weak force onthe surface are either evaporated (20″) into the atmospheric gas by heatfrom the surface of the substrate 10 or adsorbed to the periphery of themetallic cluster 400 for thermodynamic stability so as to bere-crystallized (20′). As a result of undergoing such steps, the smallmetallic clusters are uniformly spaced from one another at regularintervals and dispersed onto the surface of the substrate 10. These arethe Ga islands. Such uniformity is naturally formed by enthalpy andentropy on the surface of the substrate.

If nitrogenous source gas such as ammonia or hydrazine is supplied tothe substrate of the above state, the metallic clusters are combinedwith active nitrogen (N*) so as to be changed into a nitride 30 ornitrified Ga islands. FIG. 10 is a schematic diagram illustrating suchstate, in which all the surfaces of the clusters or Ga islands aretransformed to the nitride 30, in which untransformed metallic particles20 still exist. As time elapses, these metallic particles are rapidlytransformed to a nitride. Hereinafter, the transformed and dispersednitride or nitrified Ga island will be referred to as a “seed.”

After undergoing the step of forming a nitride particle layer, theinitial metallic layer is changed to a small and uniformly dispersednitride seed. FIG. 11 is a schematic diagram illustrating how thenitride seed formed through the above process serves to form a GaNcrystalline structure of a high quality.

FIG. 11 shows a uniform dispersion of a nitride seed 40 onto the surfaceof the substrate 10. Once the nitride seed is formed, the temperaturerange within the reaction furnace is changed to be about 950° C.˜1,300°C. in order to form a GaN layer on a full scale. Thereafter, TMG and NH₃gas are supplied to the reaction furnace to form a u-GaN layer.

At an initial stage of supplying the gas, the u-GaN is formed around thenitride seed 40, in which the seed may act as a preferred site forgrowing in view of thermodynamics. The manner of the growth seems to belateral growth. To be specific, as shown in FIG. 12, a u-GaN 50 of aninitial stage is grown laterally and surrounding the nitride seed, whichis a nitride of group III having an identical or similar chemicalproperties to itself. The crystalline structure grown at this stage is acompound of group III-V like the nitride seed. Hence, they are extremelysimilar to each other in terms of lattice constant and structure.Therefore, lattice strain or defects are rarely generated, particularlywhen the nitride seed has started from the Ga metallic islands.

Furthermore, because the lateral direction is a main direction of theu-GaN formation, the u-GaN is not seriously affected by the latticemismatch of the substrate below, as a consequence. The lateral size ofthe initial u-GaN is not so large because the space or gap between theseeds is not so distant. It is therefore considered that a perfectepitaxial layer with almost no crystalline defects is grown at thisstage.

During the growing steps performed in FIG. 13, the crystallinestructures of u-GaN become larger in size, and directly collide with oneanother to fill in the space among the nitride seeds. Such phenomenonoccurs on the entire surface of the substrate, and a u-GaN layer 50′ ofan initial stage is formed over the entire surface of the substrate.

The u-GaN layer 50′ of an initial stage has incomparably less defectdensity than the conventional low-temperature GaN buffer layer. Most ofthe defects generated on this layer are stacking faults generated on aninterface 500, on which the grown layers collide with one another asdescribed with reference to FIG. 13. However, the dominant number ofdefects is less than the conventional defect density, and evenextinguished due to rearrangement of the potential generated at a hightemperature. Accordingly, the u-GaN layer 50′ of an initial stage grownaccording to the invention has less defects than the conventionallow-temperature buffer layer while having superior surface morphology.

Once after the u-GaN layer 50′ of an initial stage in FIG. 14 is grown,the growing time is elongated so as to grow a thick u-GaN layer 60. Ann-GaN (not shown in the drawing), a GaN active layer, to which In or Alcan be added, a p-GaN layer, an electrode layer, etc. are grown on thetop of the thick u-GaN layer 60. If necessary, an ohmic contact layer ora window layer may be additionally grown thereon. Also, it is asdescribed above that a pabry-perot resonator, etc. is additionallyformed when fabricating a GaN LD.

The inventors assume that it is possible to obtain GaN thin layers withless crystal defects than the GaN thin layer using the conventionallow-temperature GaN buffer layer through the mechanism identical orsimilar to the above. However, such assumption is nothing more than anassumption, and it is out of question that other mechanisms will be ableto explain the effects of the invention depending on future researches.

MODES FOR CARRYING OUT THE INVENTION

Another method for fabricating a GaN device according to the inventioncomprises the steps of: providing a substrate; changing a temperaturerange of the substrate to be 200° C.˜1,300° C.; depositing the a Gametallic layer on the substrate; heightening the temperature range ofthe substrate, on which the Ga metallic layer has been deposited, to be900° C.˜1,300° C., while supplying gas of either H₂ or N₂; nitrifyingthe surface of the substrate, on which the Ga metallic layer has beendeposited, by supplying nitrogenous source gas to the same; and growinga u-GaN device and a GaN device on the nitrified substrate.

Once after growing the u-GaN, a GaN LED device is fabricated bysequentially stacking a n-GaN active layer, a p-GaN layer, a contactlayer and an electrode, etc. on an upper portion of the u-GaN layer. Or,a GaN laser diode may be formed by additionally forming a cavitythereon.

Detailed description of such process performed on the upper portion ofthe u-GaN layer will be omitted as it is identical or similar to thewell-known LED or LD process. When forming an active layer of suchoptical devices, however, it is out of question that oscillatingwavelengths may be diversified from the ultraviolet layer to theblue-green series by including Al, In, etc. in the Ga active layeraccording to the necessary oscillating wavelength.

INDUSTRIAL APPLICABILITY

The invention relates to a method for fabricating a GaN semiconductorepitaxial layer and a device using the same by means of Ga metal islandsuniformly dispersed onto a surface of a substrate.

The method for growing GaN as well as the method for fabricating adevice according to the invention serve to drastically decreasingcrystal defects and produce a high-quality GaN LED or GaN LD withimproved lifespan and luminance of the device in comparison with theconventional method of using a low-temperature GaN buffer layer.

While the invention has been shown and described with reference tocertain modes to carry out the invention, it will be understood by thoseskilled in the art who have understood the technical concept of theinvention that various changes in form and details may be made therein,e.g., slightly changing the temperature in each step of the process oradding the doping elements, without departing from the spirit and scopeof the invention as defined by the appended claims.

1-12. (canceled)
 13. A method for fabricating a GaN semiconductorepitaxial layer, the method comprising the steps of: (a) providing asubstrate within a reaction furnace; (b) setting a temperature range ofthe substrate to be 200° C.˜1,300° C.; (C) supplying a Ga metallicsource on the substrate; (d) changing the supplied Ga metallic source onthe substrate, to Ga metal islands; (e) supplying a nitrogenous sourceto the Ga metal islands after suspending supply of the Ga metallicsource; (f) forming GaN islands by reacting the Ga metal islands withthe nitrogenous source; and (g) growing a GaN epitaxial layer on the GaNislands by using the GaN islands as a seed.
 14. The method of claim 13,wherein the temperature range in step (b) is set to be 400° C.˜800° C.15. The method of claim 13, wherein the nitrogenous source is gascomposed at least one of ammonia or hydrazine.
 16. The method of claim13, wherein the substrate comprises any one of sapphire, SiC or Si. 17.The method of claim 15, wherein the temperature range in step (f) ismaintained to be 200° C.˜1,300° C.
 18. The method of claim 13, whereinthe step (d) is performed under an atmosphere of at least one ofhydrogen or nitrogen.
 19. The method of claim 13, wherein the GaNepitaxial layer in the step (g) is grown at a temperature of or higherthan 900° C.
 20. The method of claim 13, wherein the GaN epitaxial layergrown in the step (g) constitutes any one of LED or LD, which is capableof generating light by means of an electron-hole combination.
 21. Amethod for fabricating a GaN device, the method comprising the steps of:(a) providing a substrate within a reaction furnace; (b) setting atemperature range of the substrate to be 200° C.˜1,300° C.; (C)supplying a Ga metallic source on the substrate; (d) changing thesupplied Ga metallic source on the substrate, to Ga metal islands; (e)supplying a nitrogenous source to the Ga metal islands after suspendingsupply of the Ga metallic source; (f) forming GaN islands by reactingthe Ga metal islands with the nitrogenous source; (g) growing a u-GaNepitaxial layer on the GaN islands by using the GaN islands as a seed;and (h) growing a GaN device layer including an n-GaN layer, GaN activelayer and a p-GaN layer onto the u-GaN layer.